The implementation of neural systems is presented in this paper. The thesis focuses onrnimplementations where the algorithms and their physical support are tightly coupled. This thesisrndescribes a neural network intelligent, application, soft-algorithm to implement to hardwarernelectronics device. With the emerging of Integrated Circuit, any design with large number ofrnelectronic components can be squeezed into a tiny chip area with minimum power requirements,rnwhich leads to integration of innumerable applications so as to design any electronic consumerrnproduct initiated in the era of digital convergence. One has many choices for selecting either ofrnthese reconfigurable techniques based on Speed, Gate Density, Development, Prototyping,rnsimulation time and cost. This thesis describes the implementation in hardware of an ArtificialrnNeural Network with an Electronic circuit made up of Op-amps. The implementation of a NeuralrnNetwork in hardware can be desired to benefit from its distributed processing capacity or to avoidrnusing a personal computer attached to each implementation. The hardware implementation is basedrnin a Feed Forward Neural Network, with a hyperbolic tangent as activation function, with floatingrnpoint notation of single precision. The device used was an electronic circuit made with Op-ampsrnThe Proteus Software version 8.0 was used to validate the implementation results of the hardwarerncircuit. The results show that the implementation does not introduce a noticeable loss of precisionrnbut is slower than the software implementation running in a PC.