The following thesis describes the design, the synthesis, and the implementation of pulse widthrnmodulation (PWM) in Xilinx Field Programmable Gate Array (FPGA). The contribution of thisrnthesis is the development of PWM in Xilinx Integrated System Environment (ISE) CAD toolsrnand The VHDL modeling is used in the design process of PWM.rnPulse width modulation has been widely used in many applications especially in communicationrnand control systems. The paper develops high frequency PWM generator architecture for usingrnFPGA. The resulting FPGA frequency depends on the target FPGA speed grade and the dutyrncycle resolution requirements.rnIn most industrial application due to the need of design integration in control systems FPGArnbased PWM controller is advantageous over the other controller systems like microprocessor,rnmicrocontroller and so on.rnAs geometries shrink and device counts multiply, opportunities abound to do incredible thingsrnwith in the confines of a single chip (FPGA). Greater focus on design reuse, where earlier designrnis utilized and reused in later design. The power, compactness and flexibility of the FPGA basedrncontroller could be useful in motor control, particularly in robotics where those qualities arernimportant. The FPGA provides advantages over traditional methods such as microcontrollerrnbased designs and PLD/ASIC designs by combining the strengths of both. The FPGA allows forrnimplementation of parallel processing for generating the required waveforms. In addition to thisrnthe paper describes the architectural features of Xilinx FPGA to the other programmable logicrndevice and explores the design using Very high speed integrated circuit hardware descriptionrnlanguage (VHDL). The VHDL model was implemented on the Spartan 3e FPGA and optimizedrnfor space. The optimized implementation was found to consume 34 numbers of slices, 18rnnumbers of slice flip flops, 65 numbers of 4 input LUTs and 11 numbers of bonded IOBs.